Minimum qualifications: Bachelor's degree in Electrical Engineering, related fields, or equivalent practical experience. 8 years of experience in hardware engineering, with a focus on authoring technical specifications, reviewing electrical layouts, and driving verification of semiconductor tests or validation platforms. Experience driving deliverables and managing quality standards with external layout vendors, board design houses, or hardware component suppliers across multiple global geographies. Experience working within specialized semiconductor reliability or test laboratories including configuring component Burn-In ovens, high-power stress load boards, ESD simulators, and Latch-Up test setups. Experience managing engineering hardware delivery schedules, tracking cross-functional milestones, and meeting New Product Introduction (NPI) timelines. Preferred qualifications: Master's degree in Electrical Engineering, Materials Science, or related fields. Experience managing the design execution cycle of complex multi-layer test vehicles through third-party design houses or layout vendors from concept sign-off to laboratory delivery. Experience defining and verifying electrical correlation baselines between environmental stress setups and High-Volume Manufacturing (HVM) ATE environments. Deep familiarity with JEDEC silicon qualification hardware standards and how they dictate physical board testing constraints. Strong background analyzing the quality of stress factors, including power distribution networks (PDN), signal integrity degradation across extended thermal loops, and transient load behavior during reliability cycles.
