STA engineer

4+ years experience in Static Timing analysis Extensive experience with one of the commercial STA tools Familiarity with hierarchical design approach, top-down design, timing and physical convergence Experience with backend STA closure and Signoff Deep understanding of designs' constraints development Good understanding of AC timing from specs to implementation Good understanding of DFT modes and their constraints Good communication skills and team player Quick learning of flows and methods Advantage - Understanding noise and signal integrity effects Advantage - Timing margins fundamental from synthesis to signoff Advantage - Experience with scripting