Minimum qualifications: Bachelor's degree in Electrical Engineering or equivalent practical experience. 15 years of experience with design from microarchitecture through implementation with Verilog/SystemVerilog language. 10 years of experience in managing teams and groups. Experience in microarchitecture, design, verification, logic synthesis, and timing closure. Experience working with system design principles for low latency, high throughput, security, and reliability. Experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes. Preferred qualifications: Master's degree or PhD in Engineering or equivalent practical experience. Experience in micro-architecture and design of AI modules, optimizing their power, performance and area. Experience in leading chip development projects and teams and execution. Ability to motivate and focus on collaborative teams to achieve testing goals.
