At Altair Semiconductor, we develop advanced wireless and IoT solutions that connect millions of devices worldwide.
Our engineers own significant parts of each project, becoming true experts in their fields. You'll work directly with your team from initial concept through final delivery, seeing the real impact of your work.
We maintain a flat organization where ideas flow freely between engineers and leadership. Our experienced team members actively mentor newer colleagues, creating an environment where everyone can learn and grow.
We're proud that our employees choose to build long-term careers with us. Many of our team members have been with the company for years, contributing to a stable, knowledgeable workplace where collaboration comes naturally.
We understand the importance of work-life balance and want to make it easy for you to have time for everything you want to do.
What you will be doing
Hands-on, hardware engineer owning the ATE and test hardware for our cellular IoT chipset programs — DUT/load boards, multi-site test boards, HTOL/ESD and characterization setups — from requirements through bring-up and correlation, driving test-system debug to root cause. The role carries broad board-level responsibility (RF/analog front-end, multilayer PCB design, prototype bring-up) centered on test and includes international travel to debug hardware at partner and test-house sites.
On a typical day
Responsibilities
Own ATE/test hardware end to end — DUT/load boards, multi-site boards, characterization setups — through schematic, layout, fabrication, bring-up, and correlation.
Drive test-system debug to root cause (signal integrity, board-tester interface, yield/correlation) and support device characterization and screening.
Debug on-site at partner and test-house locations, including international travel.
Design RF/analog front-end circuitry for test and evaluation: RF chains, matching networks, switch topologies, and interfaces.
Design multilayer PCBs (incl. high-layer-count with blind/buried vias) in Cadence Allegro/OrCAD, with clean, manufacturable fab/assembly outputs (Gerber/ODB++, DFM, stackup/impedance).
Lead systematic failure analysis: power sequencing, RF performance, functional validation.
Take and interpret lab measurements (VNA, spectrum analyzer, scope, power/current profiling).
Coordinate with silicon, systems, firmware, test teams, and coordinate with external vendors.
Requirements
B.Sc. in Electrical/Electronic Engineering; effective cross-disciplinary communicator.
5+ years board-level hardware design, with designs taken from schematic to validated hardware in production or high-reliability contexts.
Expert schematic capture and multilayer PCB design, ideally Cadence Allegro/OrCAD.
Direct experience designing, bringing up and debugging ATE/test hardware on the tester.
Strong bench debug and failure-analysis skills.
Solid RF/analog fundamentals (matching, impedance control, RF switching, front-end trade-offs).
Proficiency with RF and general lab instrumentation.
Willing to work on-site and travel internationally.
Solid grasp of power delivery, sequencing, and low-power design for battery-powered IoT.
Nice-to-have
Experience with a specific ATE/tester family and multi-site DUT board design.
Cellular modem integration (LTE-M / NB-IoT) or comparable wireless SoC hardware.
C and/or Python for bring-up and test automation.
Tools: Cadence Allegro/OrCAD; ODB++/Gerber; ATE/test systems; RF lab instrumentation (VNA, spectrum analyzer, scope).
