Apple
Seniority was normalized from the source posting. The posting date comes from source metadata.
Skill priority is derived from the source posting.
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of Apple's ground-breaking products. You will own...
3+ years of experience in physical design of large-scale SoCs B.Sc / M.Sc Electric Engineering / Computer Engineering Extensive experience with one of the place & route tools (Synopsys / Cadence) Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages Knowledge in Verilog – advantage
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