AI NPU VLSI - Senior Team LeadAIManagement

CEVA

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Company: CEVA
Location: Ra'anana
Office: raanana · HaPnina St 7, Ra'anana, Israel
Field: Hardware Engineering
Role: Chip / ASIC Design Engineer
Type: Full Time
Level: Lead
Experience: 3+ yrs
Education: B.Sc
Posted: 4 Aug 2026

Seniority was normalized from the source posting. The posting date comes from source metadata.

Location

About CEVA

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Skills & technologies

GenAI
LLM
Machine Learning

Description

About the AI Division The AI Division is a unique and dedicated group within Ceva, driving innovation in Machine Learning and Generative AI architectures for edge devices and cloud inference. Our R&D...

Requirements

The

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