What we need to see: Degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent experience. 8+ overall years of engineering experience, with 3+ years in engineering management or equivalent tech lead experience on a path into management. Strong PCIe foundation: link training, equalization, recovery flows, and cross-generation behavior. A track record of personally driving hard link issues to root cause, working from state traces and eye diagrams alongside silicon and signal integrity engineers. Proven ability to grow engineers, run a delivery cadence, and make prioritization calls under constraint. An active operator: when execution is blocked, you step in. Clear communicator across engineers, partners, and customers. Ways to stand out of the crowd: Hands-on PCIe link bring-up on real silicon, signal integrity work, lane margining, or cross-generation interop. Direct experience with high-speed SerDes behavior, thermal-sensitive link issues, or customer-facing escalation work. Practical use of AI/ML tools in engineering — pattern matching across logs, summarizing state machine traces, building shared knowledge bases. Familiarity with networking products, Linux, and scripting in Python. Experience operating across HW/FW/SW boundaries. This is a chance to build and lead a new team with direct ownership of a critical technical surface across NVIDIA's networking portfolio. If that fits you — apply! NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We are committed to making reasonable accommodations for qualified individuals with
