About the Business Unit:
Ceva’s AI Division drives innovation in Machine Learning and Generative AI architectures for edge devices and cloud inference, with R&D spanning Neural Network Processors (NPU), Vision DSPs and advanced AI algorithms.
Our technology powers smartphones, tablets, automotive, robotics, surveillance cameras and a wide range of edge AI and 5G systems.
We combine cutting-edge hardware IP design with embedded software and system-level solutions, enabling the next generation of intelligent, energy-efficient devices.
About the Role:
In this role, you will design, optimize and develop features in the simulator.
Simulators are used daily by our architecture, algorithms, system, VLSI and QA teams – and by Ceva customers running the most advanced AI networks on our processors.
The development language is C/C++ (OOP) on Linux and Windows platforms.
Responsibilities:
Design and develop simulation software for Ceva’s NPU and DSP platforms within an agile, top-notch software organization.
Perform in-depth analysis and optimization of simulator performance and accuracy across multiple Ceva processor architectures.
Dive into a large existing codebase to debug and deliver clever solutions to complex software challenges.
Interact and engage with architecture, algorithms, system, VLSI and QA teams, including remote design centers.
Requirements
B.Sc./M.Sc. in Computer Science, Software Engineering or a related technical field.
4 years of hands-on software engineering experience.
Strong C/C++ programming and debugging skills, including OOP design of complex embedded software systems.
Comfortable diving into an existing codebase to make modifications; strong scripting skills.
Enthusiastic about ML, AI and Computer Vision, with excellent problem-solving skills and attention to detail.
Independent, self-motivated and curious, with good communication skills and the ability to manage time and prioritize tasks.
Advantages:
Experience in Python and in deploying AI/ML models.
Experience developing a simulator for hardware, or modelling internal mechanisms of ASIC platforms.
SystemC/TLM experience.
Experience developing in Linux environments.
