Valens
Seniority was normalized from the source posting.
Take part in planning, developing, and debugging solutions across the chip development flow — including simulation environments, RTL blocks, full-chip integration, FPGA code, and digital design...
BSc in Electrical Engineering from a well-known university. No prior industry experience required — this is an entry-level position with structured on-the-job training. Advantage: Verilog knowledge (design/debug). Advantage: knowledge in Specman or UVM. Advantage: any prior relevant academic or practical experience.
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