7+ years of physical design experience, leading complex process designs In-depth knowledge of process and circuit design Knowledge of physical design industry standards and practices, including physically aware synthesis, floor planning, CTS, place and route Experience developing and implementing power-grid and clock specifications Good command of industry-standard physical design and synthesis tools Understanding of scripting languages, such as Perl and Tcl Working knowledge of extraction and STA methodologies and tools Good understanding of physical design verification methodology for debugging LVS and DRC issues at chip and block level Proficiency in power delivery, signal integrity, advanced packaging, power projection, and design for low dynamic power Leading projects and managing small groups:
