Senior ASIC Architect

What we need to see: B.Sc. in Electrical Engineering from a known university Excellent grades 5+ years of experience in ASIC design/uarch/arch/performance At least 4 years of hands on experience in writing Verilog/VHDL or Strong analytic capabilities, and passion for solving logical issues Strong debug skills Ability to drive complex activities involving many interfaces and teams Good communications skill Ways to stand out from the crowd: Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc) Experience as an HW-architect. Familiar with working on large high-end ASICs. Experience in performance improvements in ASIC