2+ years of relevant experience in chip design, including internships or significant academic projects Familiarity with chip design principles and front-end (FE) design tools (e.g., Lint, Synthesis, Logic Equivalence) Coursework or project experience related to Clock/Reset Domain Crossing (CDC/RDC) verification is a plus An understanding of digital design, hierarchical design approaches, and top-down design Basic scripting skills (e.g., Python, Perl, Tcl) are highly desirable Comfortable leveraging AI/LLM tools to enhance productivity, such as for script generation, code analysis, or accelerating learning Excellent communication skills and a strong desire to work in a collaborative team environment A strong aptitude and enthusiasm for learning new tools, flows, and methodologies BSc or MSc in Electrical Engineering or Computer Engineering.