Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements. Experience with coding and scripting in C, C++, Perl, TCL, or Python. Experience with associated EDA tools, automation, and flow enhancements. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking). Experience with FPGA systems (e.g., EP, HAPS, Protium). Experience with hybrid emulation or speed bridges. Experience with coding in Verilog/SystemVerilog for design. Experience with design debug tools (e.g., Verdi, Verisium).
